| Opcode/Instruction | Op/En | 64/32 bit Mode Support | CPUID Feature Flag | Description |
|---|---|---|---|---|
|
0F 3A CC /r ib SHA1RNDS4 xmm1, xmm2/m128, imm8 |
RMI | V/V | SHA | Performs four rounds of SHA1 operation operating on SHA1 state (A,B,C,D) from xmm1, with a pre-computed sum of the next 4 round message dwords and state variable E from xmm2/m128. The immediate byte controls logic functions and round constants. |
| Op/En | Operand 1 | Operand 2 | Operand 3 |
| RMI | ModRM:reg (r, w) | ModRM:r/m (r) | Imm8 |
The SHA1RNDS4 instruction performs four rounds of SHA1 operation using an initial SHA1 state (A,B,C,D) from the first operand (which is a source operand and the destination operand) and some pre-computed sum of the next 4 round message dwords, and state variable E from the second operand (a source operand). The updated SHA1 state (A,B,C,D) after four rounds of processing is stored in the destination operand.
SHA1RNDS4
The function f() and Constant K are dependent on the value of the immediate.
IF ( imm8[1:0] = 0 )
THEN f() (cid:197) f0(), K (cid:197) K0;
ELSE IF ( imm8[1:0] = 1 )
THEN f() (cid:197) f1(), K (cid:197) K1;
ELSE IF ( imm8[1:0] = 2 )
THEN f() (cid:197) f2(), K (cid:197) K2;
ELSE IF ( imm8[1:0] = 3 )
THEN f() (cid:197) f3(), K (cid:197) K3;
FI;
A (cid:197) SRC1[127:96];
B (cid:197) SRC1[95:64];
C (cid:197) SRC1[63:32];
D (cid:197) SRC1[31:0];
W0E (cid:197) SRC2[127:96];
W1 (cid:197) SRC2[95:64];
W2 (cid:197) SRC2[63:32];
W3 (cid:197) SRC2[31:0];
Round i = 0 operation:
A_1 (cid:197) f (B, C, D) + (A ROL 5) +W0E +K;
B_1 (cid:197) A;
C_1 (cid:197) B ROL 30;
D_1 (cid:197) C;
E_1 (cid:197) D;
FOR i = 1 to 3
A_(i +1) (cid:197) f (B_i, C_i, D_i) + (A_i ROL 5) +Wi+ E_i +K;
B_(i +1) (cid:197) A_i;
C_(i +1) (cid:197) B_i ROL 30;
D_(i +1) (cid:197) C_i;
E_(i +1) (cid:197) D_i;
ENDFOR
DEST[127:96] (cid:197) A_4;
DEST[95:64] (cid:197) B_4;
DEST[63:32] (cid:197) C_4;
DEST[31:0] (cid:197) D_4;
SHA1RNDS4: __m128i _mm_sha1rnds4_epu32(__m128i, __m128i, const int);
None
None
See Exceptions Type 4.